IEEE Journal: Adam Carter discusses success in 3D PIC design, development, and manufacture

In an interview published in the IEEE Journal of Selected Topics in Quantum Electronics, Adam Carter discusses the key factors that must be addressed for 3D photonic integrated circuit (PIC) design, development, and manufacturing to succeed at high volume. Early applications are likely to include optical interconnects between chips, such as SerDes and GPUs/CPUs, with co-packaged optics emerging as the leading near-term market for commercially viable, system-level stacking.

3D photonic integration stacks functional PIC layers vertically to increase density and shorten interconnects, rather than placing them side by side on a shared substrate, as in 2.5D designs. Its main advantage is the ability to fit more functional channels into the same footprint, although thermal management and laser integration remain major production challenges.

Manufacturability depends on factors such as yield, alignment, thermal management, testing, and reliability as academic concepts are scaled to high-volume production. Design tools must also support practical 3D co-design across optical, electronic, thermal, and mechanical domains to balance performance with manufacturability.

Looking ahead, Adam expects the industry to approach an inflection point over the next three to five years, with traditional copper interconnects increasingly displaced in high-performance links and more advanced photonic integration architectures moving toward commercial deployment.

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